JPH0450888U - - Google Patents
Info
- Publication number
- JPH0450888U JPH0450888U JP9319990U JP9319990U JPH0450888U JP H0450888 U JPH0450888 U JP H0450888U JP 9319990 U JP9319990 U JP 9319990U JP 9319990 U JP9319990 U JP 9319990U JP H0450888 U JPH0450888 U JP H0450888U
- Authority
- JP
- Japan
- Prior art keywords
- lsi
- display
- circuit
- variable resistor
- stages
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9319990U JPH0450888U (en]) | 1990-09-05 | 1990-09-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9319990U JPH0450888U (en]) | 1990-09-05 | 1990-09-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0450888U true JPH0450888U (en]) | 1992-04-28 |
Family
ID=31830216
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9319990U Pending JPH0450888U (en]) | 1990-09-05 | 1990-09-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0450888U (en]) |
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1990
- 1990-09-05 JP JP9319990U patent/JPH0450888U/ja active Pending